Principal/Sr. Principal FPGA Design Engineer

Company: Northrop Grumman
Location: Rolling Meadows
Posted on: April 2, 2026

Job Description:

RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Multi-domain Sensing, Targeting, and Survivability Division (MSTS), located in the Northwest Chicago suburbs, develops operational Electronic Warfare (EW) and targeting systems that provide situational awareness, self-protection, and offensive electronic attack capability to platforms across the spectrum from visible light IR to millimeter wave RF. By joining us, you’ll work on projects that help safeguard our nation related to land forces, rotary wing survivability systems, international and U.S. military electronic warfare systems, communications systems, missile warning systems and sensors, infrared counter-measure systems (IRCM), automatic test equipment, modeling and simulation, and situational awareness programs. The Principal/Sr. Principal FPGA Design Engineer role involves full life-cycle product development from system concept and requirements through design, implementation, test verification, production, field support while working in integrated product teams spanning Engineering, Manufacturing, and Program Management. Digital subsystem and circuit card designs utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Altera, and Actel, and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and interfaces. Job Description: As a Principal/Sr. Principal FPGA Design Engineer, you will join our diverse team and be responsible for research, design, and development of digital hardware products. Your expertise in digital component design and analysis, modeling and simulation, circuit level design and test, and project leadership are desired for this position. Research, designs, develops, and tests a variety of electronic equipment and systems, including radar and radiation detection equipment; radio, television and other communications equipment and systems; circuitry components; analog and digital computers; and control and test equipment. *This position may be filled at either a Principal or Sr. Principal FPGA Design Engineer level based on the qualifications listed below. * This position will be full-time and on-site at our Rolling Meadows, IL. location. Basic Qualifications for a Principal FPGA Design Engineer: - Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years of digital electronics design experience or 3 years of digital electronics design experience with a Master's degree in a technical field or in lieu of degree, an additional 4 years of experience is required. - Digital circuit design experience, including simulation & schematic capture through test and integration - Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high speed interfaces. - Demonstrated ability to lead projects with 2 or less team members. - Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications. - Familiarity with documentation revision control and review systems similar to DOORS, ClearCase, and ClearQuest. - US Citizen and must have interim secret clearance prior to starting. Once started, must have the ability to obtain and maintain a Secret security clearance. Basic Qualifications for a Sr. Principal FPGA Design Engineer: - Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years of digital electronics design experience or 6 years of digital electronics design experience with a Master's degree in a technical field or in lieu of a degree, an additional 4 years of experience is required. - Extensive digital circuit design experience, including simulation & schematic capture through test and integration. - Extensive hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high speed interfaces - Demonstrated ability to lead projects with 2 or more team members. - Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications. - Familiarity with documentation, revision control and review systems similar to DOORS, ClearCase, and ClearQuest. - US Citizen and must have interim secret clearance prior to starting. Once started, must have the ability to obtain and maintain a Secret security clearance. Preferred Qualifications: - Advanced degree in Electrical or Computer Engineering with a minimum 12 years of digital electronics design experience. - Working knowledge of Electronic Warfare systems. - Experience in Aerospace and/or Defense industries. - Recent circuit card design experience utilizing circuit-related tools including Cadence Concept, Allegro, and/or Mentor DxDesigner, Expedition. - Working experience with ClearCase/ClearQuest and DOORS Current Secret or Top Secret Security Clearance. - Proven skills to include: team leadership, mentoring others, communicating with all levels of an organization internally and externally, being adaptable, creative, collaborative and also comfortable working independently and enjoys solving difficult problems Primary Level Salary Range: $119,600.00 - $179,400.00 Secondary Level Salary Range: $149,300.00 - $223,900.00 The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates. Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Keywords: Northrop Grumman, Janesville , Principal/Sr. Principal FPGA Design Engineer, Engineering , Rolling Meadows, Wisconsin